Mandi, India  – Dr. Anuj Verma, a researcher in the field of VLSI Design, has been honoured with the prestigious Best PhD Thesis Award at the 38th IEEE VLSID 2025 Conference held in Bengaluru. This recognition highlights Verma’s groundbreaking research in advancing VLSI technology and its significant impact on the field of wireless communication standards.

The awarded thesis, titled “Efficient VLSI-Architectures and ASIC-Fabrication of Channel Decoder for Contemporary Wireless-Communication Systems”, delves into innovative solutions for hardware efficient and high throughput reconfigurable channel decoders for wireless communication standard. This research addresses critical challenges in the field of 5G New Radio standard, showcasing practical applications that can revolutionize the VLSI design landscape. “I am deeply honoured to receive this recognition. This award is a testament to the dedication and collaboration. I would like to dedicate this award to my supervisor, Dr. Rahul Shrestha, whose guidance and mentorship were instrumental in shaping my research journey. I also extend my heartfelt gratitude to my family, whose constant support and encouragement kept me motivated, and to the VLSID 2025 Conference committee members for recognizing my work.” said Verma.

This award reflects the innovation and impact of Verma’s research in advancing energyefficient and reconfigurable architectures for next-generation wireless communication systems. It also highlights their commitment to pushing the boundaries of technology in VLSI design. Verma’s research contributions have already made a significant mark in the VLSI domain, with multiple publications in reputed journals, including IEEE TCAS-I, IEEE TVT, and IEEE TCAS-II. Verma’s aim is to contribute further to cutting-edge research in VLSI Design, collaborate with industry and academia, and inspire innovation in the field of Advanced VLSI Design.